Transistors based on 2D materials still suffer from poor contact with source and drain electrodes. Conventional fabrication processes can induce defect states, which in turn affect the intrinsic electronic properties of 2D materials. There have been extensive studies on improving the performance of 2D materials. These studies show that Schottky barrier between VdW material and contact electrode can be significantly lowered compared to conventional methods, allowing the probing of electronic states and properties of VdW material.. Here, we fabricate VdW-FETs and a customized deposition method by aligning VdW material to a pre-fabricated source and drain electrodes, minimizing lattice structural defects. Using contact engineering techniques, it is possible to modulate the electron transport of these 2D materials. For example, one newly discovered method is induction of a large thermal energy pulse on the transistor. The figure on the left shows how this thermal energy pulse can modulate the maximum conductivity, causing radical changes in the measured Ion/Ioff ratio, the sub-threshold swing, and the contract resistance. In our group, we use complementary methods to increase the device performance